Hardware Validation & Debug Engineer

📋 Description Debug high-speed interfaces for AI system performance Own lab validation and debug for SerDes, PCIe Root Complex and Ethernet Tune links, investigate failures, drive data-based decisions 🎯 Requirements Hands-on hardware validation with board bring-up and subsystem debug Experience with Ethernet, PCIe Root Complex and SerDes Lab instrumentation: scopes, BERT, VNA/TDR, PCIe analyzers Debug signal integrity and protocol issues to root cause PCIe bring-up, LTSSM analysis, link training and testing Independent, responsible, cross-team issue resolution 🎁 Benefits Flexible working and generous leave Retirement planning: up to 5% matched pension Phantom equity and on-site office amenities Income protection and life assurance Flexible benefits including private medical & dental