New Graduate Engineer, Silicon Engineering

📋 Description

• Develop next generation silicon for SpaceX on Starlink program.
• Participate in ASIC/FPGA design and verification across pre- to post-silicon phases.
• Work on RTL design, verification, emulation, and design architecture with embedded software (C/C++
• Collaborate in RF/Analog IC design and physical design activities in lab environments.
• Hands-on, self-starting engineer to fully verify complex digital designs.

🎯 Requirements

• Graduating with a bachelor’s, master’s, or PhD in 2026 or 2027.
• Bachelor’s in engineering, mathematics, or physics.
• Experience with ASIC, SOC, FPGA, RFIC, or MMIC.
• Proficiency in SystemVerilog/Verilog/VHDL and C/C++ and/or Python.
• Understanding of computer architecture; DSP and digital communication concepts.
• Experience with RTL design, chip bring-up, verification, and post-silicon validation.

🎁 Benefits

• Base salary ranges from $125,000 to $195,000 depending on level and experience.
• Stock options or long-term incentive opportunities; discretionary bonuses possible.
• Comprehensive medical, vision, and dental coverage; 401(k) plan; disability and life insurance.
• Paid parental leave; 3 weeks of paid vacation; 10+ paid holidays; sick leave per policy.