Mountain ViewFull TimeEngineering
Remotely
pythonmicroarchitecturegpunpusystemverilogcpuasic rtl
Job Description
📋 Description
- Translate high level requirements into hardware features
- Specify and design microarchitectures for ML performance
- Explore and optimize power, area and performance of digital ASICs
- Design high performance execution units and programmable engines
- Collaborate with verification teams for correctness and performance
🎯 Requirements
- BS in Computer Engineering or equivalent practical experience
- 5+ years in SystemVerilog, ASIC RTL design and microarchitecture
- 3+ years designing microarchitectures for high performance cores (CPU/GPU/NPU)
- Fluency in Python and C++
🎁 Benefits
- Base salary $175,000 – $215,000 USD
- Discretionary annual bonus and equity incentive plan
- Company benefits program
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