Job Description
📋 Description Partner with design and architecture teams to translate hardware specifications into comprehensive Drive the development of testbenches, reference models, and stimulus to validate mission-critical Architect and enhance verification environments, contributing to shared tools and reusable Evaluate, integrate, and verify third-party Verification IP (VIP) to accelerate the development Define and analyze coverage metrics (functional and code) to ensure design readiness and closure Advocate and establish verification best-practices 🎯 Requirements 3+ years of experience building and maintaining complex testbenches using UVM/SystemVerilog Proven track record with constrained-random generation, functional coverage, and SVA (SystemVerilog Deep understanding of complex digital logic and the ability to debug intricate hardware/software Proficiency in Python for developing scalable automation frameworks, data analysis tools, and Excellent verbal and written communication skills, ability to collaborate with cross-functional Strong analytical skills in root-causing failures across RTL, testbench, and environment layers 🎁 Benefits Salary range: $175,000 - $215,000 USD Waymo employees are eligible to participate in discretionary annual bonus program, equity incentive
